My Research Page

  Research Interests:

	Core-based System-on-a-chip (SOC) Design and IP reuse.
	Hardware-software Codesign.
	CAD Tool Design
	Asynchronous logic Design (Self-timed Systems) and CAD Tools Design, Async Group of Columbia University, USA   Amulet Group of Manchaster University, UK Async VLSI group of California Institute of Technology, USA Center of Aysnc Circuit and System of University of Utah, USA
	Field Programmable Gate Arrays (FPGAs) and Reconfigurable Computers
	Java-enabled Embedded System and Java Technology.
	Real-Time OS.
	Smart Appliances and Information Appliances
	Expert Database Systems.

  Tech Interests:

	Java Applications: Java, Java for PDAs (iPAQ and Palm) and Java Card
	VHDL, Verilog
	Object-Oriented Computing.
	OOAD, UML, CMMI
	Cross-platform applications.
	Expert Systems: OPS5, OPSJ, JESS

  Publications:

	Fu-Chiung Cheng, "System-on-a-chip, Hardware-software Codesign and Java Technology for Information Appliances" To appear in Sino-American Technology and Engineering Conference, Oct. 2001
	Fu-Chiung Cheng and Shuen-Long Ho, "Efficient Systematic Error-Correcting Codes for Semi-Delay-insensitive Data Transmission", To appear In the Proceedings of the International Conference on Computer Design (ICCD'01), IEEE Computer Society Press, Sept. 2001
	Fu-Chiung Cheng, Stephen H. Unger and Michael Theobald, "Self-timed Carry-Lookahead Adders", IEEE Transactions on Computers, pages 659-672, July 2000.
	Fu-Chiung Cheng and Chuin-Ren Wang, "Specification and Design of a Quasi-Delay-Insensitive Java Card Microprocessor", In the Proceedings of  the Thirdteenth International Conference on VLSI Design, pages 356--361. IEEE Computer Society Press, Jan 3-7, 2000.
	Fu-Chiung Cheng, "Practical Design and Performance Evaluation of Completion Detection Circuits", In the Proceedings of the International Conference on Computer Design (ICCD'98), pages 354--359. IEEE Computer Society Press, 1998.
	Steve M. Nowick and Niraj K. Jha and Fu-Chiung Cheng, "Synthesis of Asynchronous Circuits for Stuck-at and Robust Path Delay Fault Testability", IEEE Transactions on Computer-Aided Design, vol 16, pages 1514-1521, Dec. 1997.
	Fu-Chiung Cheng, Stephen H. Unger, Michael Theobald and Wen-Chung Cho, "Delay-Insensitive Carry-Lookahead Adders", In the Proceedings of the Tenth International Conference on VLSI Design, pages 322-328. IEEE Computer Society Press, 1997. This paper won the "Honorable Mention Award."
	Fu-Chiung Cheng, "Synthesizing Iterative Functions into Delay-Insensitive Tree Circuits", In the Proceedings of the International Conference on Computer Design (ICCD'97), pages 301-306. IEEE Computer Society Press, 1997.
	Steve M. Nowick and Niraj K. Jha and Fu-Chiung Cheng, "Synthesis of Asynchronous Circuits for Stuck-at and Robust Path Delay Fault Testability", In the Proceedings of the Eighth International Conference on VLSI Design, IEEE Computer Society Press, 1995.
	Fu-Chiung Cheng Hwei-Hwang Chen and Jiin-Hwai Perng, "Parallel Execution on Production Systems", In the Proceedings of the International Symposium on Parallel and Distributed Processing, IEEE Computer Society Press, 1990.
	Fu-Chiung Cheng, Stephen H. Unger "Synthesis of High Performance Totally Self-Checking Delay-Insensitive Tree Circuits", Submitted to the IEEE Trans. on Computer-Aided Design of Integrated Circuits and Systems .
	Fu-Chiung Cheng, "Practical Design and Performance Evaluation of High Speed Delay-Insensitive Tree Comparators", Submitted to the IEEE Trans. on Computers.